| Ruth,
I am specifically pushing back against the assumptions you are making, e.g. "high quality tools and libraries". I wish I could lay my hands on the "simple" diagram showing the structure of ARM Android; over Linux, with special hardware layer, with an OS-layer-over-Linux that made big use of remote procedure calls under some special name, with layers of object oriented stuff, about 20 in all; it makes my head spin and I rebel against it because this complexity is not necessary. The Transputer was, by your definition, a hobby project, but it did not disappear quickly despite the lack of "high quality" (fantastically complex) tools and libraries. It had simple tools and libraries that enabled you to do EVERYTHING in computing (including an autonomous automobile on the Autobahn in 1993). This approach can be used again; it is valid independently of scale.
Larry
Larry, I was talking about the time taken for a new architecture (e.g.
ARM, x86, ...) to gain both mindshare and the high quality tools
and libraries needed to be a commercial success. Of course, anyone
can these days go and build a new CPU or whatever, and probably
within a few months create a port of clang or gcc or whatever to
target it. That just makes it a hobby project which is likely to
disappear just as quickly. For the effort to make a difference in
the industry needs sustained effort over years. Ruth
On 24/11/2020 17:47, Larry Dickson
wrote:
Ruth and all,
What do you know about RISC-V? Would it be hard to implement
occam on it?
I am trying to get beyond what is commonly assumed about
"architecture", namely
architecture=hardware-design-that-supports-kernels-and-OSs. When
you ditch the kernel and the OS, issues about architecture
become much less pressing, e.g. Arduino, MSP430, any number of
GPUs. You write in assembly, or you write in a bare language
like C or OpenCL.
You are right about decades to accept a standard OS-linked
"architecture" like ARM, where you are stuck floating on top of
Android Java, or else navigating down through about twenty
different types of coding to reach the bare metal.
Larry
Tony,
On 24/11/2020 09:49, Tony Gore
wrote:
Hi Larry
Your modern
transputer sort of exists. Take a Raspberry-Pi 4 –
it has 1 gigabit ethernet connection, 2 USB 3 and 2
USB 2 so using USB to ethernet dongles, you can
effectively get up to 5 comms links, although their
speed won’t be perfectly balanced, and you can use
the wifi as the “control” port. People have built
clusters of these for their own personal
supercomputers.
The only problem here is the packet write latency, even
over the built-in ethernet it's likely to be several
million cycles.I would think very poorly of any solution
that exceeded a thousand cycles... especially as much of
that delay is due to the I/O blocks being "distant"
(clock-wise) from the CPU core.
All we need is a
kernel to support the comms and interpret the occam
byte code – as it has a quad core processor, you
could use one core to handle the comms, one the code
interpreter and one the kernel.
@geerlingguy is one person who has blogged and youtube'd
extensively about this, and deserves a look if you're
interested.
I would be very nervous about trying to create a new
architecture; people very commonly vastly underestimate
the time and effort taken for a new architecture to gain
sufficient traction to become useful. For ARM it was about
a 15 years; ARC never made it after over a decade trying;
i960 tried for two decades before dying; RISC-V is
starting to make good progress after a decade, buoyed by
being open source and changing markets.
Starting from a known well supported base is far more
likely to produce a good result. If you're not keen on
ARM, try RISC-V, as it at least is open.
Regards,
Ruth
--
Software Manager & Engineer
Tel: 01223 414180
Blog: http://www.ivimey.org/blog
LinkedIn: http://uk.linkedin.com/in/ruthivimeycook/
--
Software Manager & Engineer
Tel: 01223 414180
Blog: http://www.ivimey.org/blog
LinkedIn: http://uk.linkedin.com/in/ruthivimeycook/
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