| Hi Tony, David and all, Does anyone remember how many transistors are in a link? We are gathering information on transistor efficiency; now Tony's numbers indicate floating point costs about 50,000, and David on memory indicates 4KB costs about 200,000. 25,000 for CPU and 25,000 for links would indicate 6000 per link, but that is just a guess and I could be way off. As you may be guessing, I am imagining an eight-link Transputer! Long ago, in my PDPTA'96 Roadmap paper, I calculated "burden bandwidth" for a one-direction link communication using Forrest Crowell and Neal Elzenga's published measurements, and got 37MB/s, same whether links were running one-way or both-ways, and per-unidirectional-communication timing bandwidth of 1.2 MB/s when running both ways. This means by extrapolation that eight links running full speed both ways would be supportable (reducing CPU speed by 52% due to DMA burden). Everything can be mapped into modern cores and communications (e.g. Manchester code lanes); the principle stays the same. Larry On Mar 18, 2019, at 9:59 PM, Tony Gore <tony@xxxxxxxxxxxx> wrote:
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