| If I recall the T4 was 25% RAM, 25% processor. 25% link and 25% other - by area (things like pads take up a lot of space but not many transistors). The RAM is much more transistor dense than the other blocks. The link block (4 bidirectional links and the event channel) is significantly less dense - the ‘register’ part is CPU like but the actually shift registers and synchronisers are very non-dense. So, perhaps 25% of the density of RAM overall. Now, doing the measurement on my photograph, it looks like 4 links occupy 2/3rds the area of the RAM which gives 200k * 25% * 2/3 = 33k transistor for 4 links = 8k per link (which is in line with your estimate below). I suspect your estimate is nearer to the truth than mine. But in assessing anything you need to consider that the transistor count is affected by word size (two words of buffer, one word of address) and control of the interconnect to route bytes into the buffer etc. Roger
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