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Re: Transputer - schools

On Jun 29, 2013, at 11:28 AM, Ian East <ian.east@xxxxxxxxxxxxxxxxxxxxxxxxx> wrote:

On 29 Jun 2013, at 19:18, Larry Dickson <tjoccam@xxxxxxxxxxx> wrote:

It might be of value for you to cobble up two or three examples where "prioritised vectored interrupts" give a clear advantage over round-robin interrupts (which is what PRI PAR amounts to). The advantage has to be clear, because of the price paid in priority inversions. It always seemed to me that round-robin interrupts were enough to give the required response in most problems - unless you did not have enough hardware. And Transputer-style PRI PAR can be implemented on any embedded chip that offers interrupts.
I admit it is a long time since I needed them, and I could nowadays saturate the problem with resources, but the logic remains.

We built astronomical instrumentation.  An example of a high-priority task was the arrival of data, or a telescope about to hit the wall (very crude computer control in them days!), over low-priority tasks like continuing data reduction or temperature control.  Surely auto and aviation control systems have even more demanding behaviour to express.

If "arrival of data" and "telescope about to hit the wall" are two interrupts, each having a real time requirement of 1 msec in response, and the ISR for each can never take more than 500 usec, then (roughly speaking) a round robin should suffice. If there are n interrupts, and the maximum ISR time is <= 1/n times the minimum real time response requirement, similarly OK. Low-priority tasks like data reduction or temperature control would be Transputer low priority, and all interrupts would be Transputer high priority. Of course you also have to worry about timeslicing taking too long for the temperature control.


Perhaps it's just me!

PS Must go off line till late tomorrow now.

Ian East
57, Kidlington Road, Islip, Oxfordshire OX5 2SS
(+44) 0 1865 373268