It might be of value for you to cobble up two or three examples where "prioritised vectored interrupts" give a clear advantage over round-robin interrupts (which is what PRI PAR amounts to). The advantage has to be clear, because of the price paid in priority inversions. It always seemed to me that round-robin interrupts were enough to give the required response in most problems - unless you did not have enough hardware. And Transputer-style PRI PAR can be implemented on any embedded chip that offers interrupts.
On Jun 29, 2013, at 11:05 AM, Ian East <ian.east@xxxxxxxxxxxx> wrote: