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RE: Massively parallel FPGA systems


> I'm still working on a compiler that takes Occam/CSP and 
> targets FPGAs,
> with the specification and implementation of transputer-like CPUs as
> one major goal, so I would be interested in your applications of a
> multi-processor FPGA.  Interestingly, the internals of a CPU appear
> quite difficult to specify efficiently in a CSP-like 
> language, and also
> quite difficult to implement in FPGA [think "shared data bus" in both
> cases].

At least for the implementation of CPUs on FPGAs, there are folks 
who do it.  In fact there are mail-list devoted solely to the topic.
See http://www.fpgacpu.org/

Now, as for shared busses in CSP, I can see why they may make it hard
for theorem proving tools.  Is that what you mean? I'm not seeing why 
they're inherently difficult to specify (implement).  Could you enlighten