Re: WoTUG

[tjoccam@xxxxxxxxxxxxx (Lawrence Dickson)]

THIS IS GOOD STUFF! See extended comments below. First some questions...

> Subject: Re: WoTUG
> To: tjoccam@xxxxxxxxxxxxx (Lawrence Dickson)
> Date: Wed, 27 Oct 1999 21:12:31 +0100 (BST)
> From: "Roger Peel" <R.Peel@xxxxxxxxxxxxxxx>
>
>
> Larry,
>
>
> >    Off the subject: someone mentioned Alpha links. Any details... ?
>
> I put this on an OHP slide for my final year Comp Arch class :
>
>
>
> 1.6GHz Alpha to be fastest Quake chip on planet
>
> <snip>
>
> The 21364 integrates CPU, level two cache, direct memory controller and a
> transputer-class multiprocessing connection of each processor to four
> others at 10 Gbytes/s interprocessor bandwidth,

(a) Does this mean 10 Gbytes/s per LINK, or on all four links combined?
(b) How many pins per link? See my comments, below. (c) What
interprocessor distance is supported? (d) What about latency?

> in addition to cache and
> memory bandwidth, plus a dedicated 3.2 Gbyte/s IO bandwidth per CPU on one
> processor.
>
>
> It is likely that the 21364 will also incorporate support for CPU
> lockstepping.
>
> Edited by RMAP from http://www.theregister.co.uk/990831-000012.html
>  (subsequently deleted from The Register site?)
>
> >    We need a new Transputer.
>
> Barry Cook and I are looking at how much more work needs to be done to
> our Occam-to-FPGA compiler to build one.
>
> Have you seen http://www.ee.surrey.ac.uk/Personal/R.Peel/wotug22.ps ?

Now I have. I downloaded it and it is GREAT! I noticed it pointed toward
dates already past - I'm out of touch it seems - did you finish the
Portakit processor? Why this is great, see below...

> Roger.
>
>
>
> Dr. Roger M.A. Peel
> School of Electronic Engineering, Information Technology and Mathematics
> University of Surrey
> Guildford                              Phone: +44 1483 879284 (01483 within UK)
> Surrey  GU2 5XH                          Fax: +44 1483 876051
> United Kingdom                         Email: R.Peel@xxxxxxxxxxxxxxx

I got on board after occam 1; my handbooks were the occam 2 reference
manual (1/4" thick) and the Transputer instruction set compiler writer's
guide (also 1/4" thick). Also the B008 description which gave a solid
hardware foundation for extending occam to the PC, never exploited.

Now we need the occam 1 reference manual and the Portakit instruction set
(39 integer instructions)! With miniaturization, raw CPU power increases
as the cube. Pin count increases as the square, and edge connections
increase only linearly. So the hangups are increasingly in connectivity.
The Portakit moves away from the T9000 in the direction of tremendously
successful Microchip Technologies, whose PIC processors specialize in
driving individual pins to do a great variety of things. (PICs have
about 35 instructions.)

Fitting your separate memory model, PICs mate with tremendously popular
serial memory (some uses only one wire!) - very slow but it saves those
valuable pins. Nothing comes anywhere near OS links - fast, 2 pins (so
it has a big advantage over DS links too). Think of the connectivity
required for sensors and control of a car or airplane. Timing is not so
demanding, being human scale, but robustness under complex IO is
totally required. PICs, as normally programmed, fail THAT test; only
occam passes it.

Finally there's cost. Transputers might have referred to transistor-like
arrays but they cost a lot more than transistors. Maybe the Portakit
could bridge that gap at last. Define printers and cars and washing
machines using occam and who cares if we have to deal with four bit
integers.

Larry Dickson