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Re: Is PRI PAR useful for hardware?
Adrian Lawrence asked :
> Is PRI PAR useful for hardware?
> We usually think of PRI PAR as a mechanism for managing a limited software
> resource - mainly time - on a uniprocessor.
> But resources are also limited in hardware. In reconfigurable technology,
> the limited resource is usually space. With partially reconfigurable
> hardware like the late lamented XC6000 series, the whole point is to
> dynamically reload sections of a chip with the most urgent task: exactly
> the function of PRI PAR?
> This is really thinking out load following comments at WoTUG-22, especially
> by Barry, to the effect that perhaps PRI PAR is not needed.
> But I don't understand the alternative proposal: was it based on the idea
> that priority is attached to events rather than processes? I am not really
> sure that CSPP does not already attach priority to events.
The issue does appear to revolve around reconfigurability.
Barry and I have (so far, at least) concentrated on producing static
circuits that implement the whole of an occam program. In this case,
all of the processes genuinely run in parallel, and PRI PAR has little
meaning since there is no timesharing of a single processor to
prioritise. PRI ALT, or a fair ALT, or whatever, is still required to
deal with incoming communications, and possible starvation in the face
of high traffic on some channels. Prioritised channels (or events)
appear sufficient when everything is truly running in parallel.
When resources run out and reconfiguration is used, a scheduler again
would have to determine which processes (or fragments thereof) should
be loaded and run. This decision might require hints derived from the
Dr. Roger M.A. Peel
School of Electronic Engineering, Information Technology and Mathematics
University of Surrey
Guildford Phone: +44 1483 259284 (01483 within UK)
Surrey GU2 5XH Fax: +44 1483 534139
United Kingdom Email: R.Peel@xxxxxxxxxxxxxxx