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design & checking tools
At 10:19 AM 4/22/99 +0000, p0072370 wrote:
>Am I missing something here?
I think so! Namely Jeremy's paper in WoTUG-20 "A Tool for Proving Deadlick
Where he reports that exhaustive state analysis of the Dining Philosophers
the evaluation of some 10^50 states whereas his method requires the
construction of a digraph
with 800 vertices and check that for circuits.
If FDR releases the code to construct a netlist and we follow some
reasonable design restrictions we can use Jeremy's tool!