Application-Specific Multi-Processor SoC ... No WoTUG?

[Ian Phillips <ian.phillips@xxxxxxx>]

Guys
    I would have thought that CSP, Transputer(Vn), Occam, would need a 
voice in forums like this if it is to reemerge from the wilderness. If not 
a speaking voice, active audience participation ...

    ... It still seems to me that the emerging generations of 
computer-based systems could valuably learn from the Occam/Transputer 
experience.

Constructively.ian

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IAN PHILLIPS ...                eMail: ian.phillips@xxxxxxx
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Application-Specific Multi-Processor SoC
==========================================
SUMMER SCHOOL
8 - 12 July 2002, Château de Pizay, France


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Sponsored* by  IEEE Circuits & Systems Society   and    EDAA
Organized by Ahmed A. Jerraya, TIMA Laboratory, Grenoble, France
        and  Wayne H. Wolf, Princeton University, Princeton, USA


FOCUS
The principal objective of this course is to study the emerging areas of 
Application-Specific Multi-Processor System-on-Chip (SoC). The main idea is 
to gather key R & D people from the different domains required to master 
this new kind of systems where designers have to integrate more than one 
instruction set processor on a single chip, these may include DSPs and 
microcontrollers. Typical applications are wireless, image processing, 
XDSL, network processors and game computers.


CONTENTS
The 5-day course is organized as a set of 9 half-day sessions including 
each 3 tutorials that give comprehensive presentations of state-of-the-art 
research in academia and advanced practices from industry. This course is a 
unique occasion to listen to more than 20 top world-class professors in the 
5 key areas required for the training of next-generation SoC designers.


LECTURERS
=========
SoC Design & Test  Methodologies
 o Francky Catthoor, IMEC, Belgium
 o Giovanni De Micheli, Stanford U., USA
 o Ahmed Jerraya, TIMA, France
 o Luciano Lavagno, U. of Udine, Italy
 o Wolfgang Rosenstiel, FZI, Germany
 o Yervant Zorian, Virage Logic, USA


Embedded Software
 o Krishna Palem, Georgia Tech, USA
 o Jens Palsberg, Purdue U., USA
 o Pierre Paulin, STMicroelectronics, Canada
 o Hiroto Yasuura, Kyushu U., Japan


System Architecture
 o Rolf Ernst, TU Braunschweig, Germany
 o Philip Koopman, CMU, USA
 o Trevor Mudge, U. of Michigan, USA
 o Peter Pirsch, U. of Hannover, Germany


Application-Specific Multi-processor SoC Design Cases
 o Faraydon Karim, STMicroelectronics, USA
 o Chris Rowen, Tensilica, USA
 o Rob Schreiber, Hewlett Packard Laboratories, USA
 o Kees Vissers, TriMedia Technologies Inc., USA
 o Wayne Wolf, MediaWorks Technology, USA


Embedded Real-Time Operating Systems
 o Kang Shin, U. of Michigan, USA
 o Eric Verhulst, Eonic Solutions, Germany


FEE
The fee amounts to 1750 ?. IEEE members benefit from a reduced fee at 1500 
?. The student fee amounts to 900 ?. It will cover the documentation, the 
lunch for five days, dinner for four days including the social dinner. 
Accommodation in the Château de Pizay amounts to 42,5 ?/night in a shared 
double room and to 70 ?/night in a single room. The attendance will be 
limited to 55 persons. It is necessary to register in advance. Registration 
will be handled on a first-come-first-served basis.


REGISTRATION, ACCOMMODATION, VENUE, and FURTHER INFORMATION
All information is available via www:   http://tima.imag.fr/MPSOC
You may also contact: Dr. Ahmed A. Jerraya
TIMA Laboratory, 46 Avenue Félix Viallet, 38031  Grenoble CEDEX, France
Fax: +33 476 47 38 14       Phone: +33 476 57 48 64 Email: 
Ahmed.Jerraya@xxxxxxx