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RE: Disable interrupts in critical sections?

I used to write things such as engine controllers in assembler (for

These were effectively a simple operating system - two main processes - a
background one that did calculations on fuel amount, temperature etc and a
foreground one that was interrupt driven (that actually set up firing the

The critical section was the passing of parameters from the background
process to the foreground process (not needed if only one byte used, as this
is atomic) - you could not have half new data and half old data.

Thus, two buffers were used, with a flag to show if a buffer was valid and
the most up to date one. Background data would be written to the buffer with
the flag clear (and hence could survive being interrupted) and only when
complete would the flag for the buffer be set and the other one cleared.

The first thing you did when entering the foreground process (usually called
by an interrupt) was to disable further interrupts (the micros I was using
had no "test and set" or other instruction that was atomic), mostly because
there was a fixed 16 or 32 byte stack.

This was all done long before I got involved with transputers and occam and
discovered terms such as "critical section".

Generally, most embedded systems rely on interrupts to keep them
synchronised with the real world they are in, and the trick is to keep the
critical sections to a minimum - interrupts may be disabled elsewhere, but
this may be due to limitations in the implementation e.g. the limited (and
often fixed stack) of single chip micros used in embedded systems.

Not having read the book, it may be that it has not been made clear where
techniques / decisions are due to implementation limitations e.g. no TAS
require stricter approaches.

Tony Gore

Aspen Enterprises Limited
Aspen House, Burton Row, Brent Knoll, Somerset TA9 4BW.  UK
email  tony@xxxxxxxxxxxx (alternative if problems tony.gore@xxxxxxxxxxxxxx)
tel +44-1278-761001  FAX +44-1278-760006  GSM +44-468-598570
URL: www.aspen.uk.com

-----Original Message-----
From: Oyvind Teig [mailto:Oyvind.Teig@xxxxxxxxxxxx]
Sent: 10 August 1999 14:30
To: occam-com@xxxxxxxxx; java-threads@xxxxxxxxx
Subject: Disable interrupts in critical sections?

The book "Programming Embedded Systems in C and C++" (Michael
Barr) / O'Reilly, states that 

  A critical section is a part of a program that must be 
  executed atomically. That is, the instructions that make up
  that part must be executed in order and without interruption.
  Because an interrupt can occur at any time, the only way
  to make such a guarantee is to disable interrupts for the
  duration of the critical section. (p105-106)

He continues:
  These are the critical sections that we talked about earlier,
  and there are no alternative methods for protecting them. (p122)

He builds an operating system, and disables interrupts all the time.

I thought that operative system curriculum taught that it should
be enough to have an atomic test-and-set instruction to build on? 


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