Re: Disable interrupts in critical sections?

["B.M. Cook" <b.m.cook@xxxxxxxxxxxxxx>]

This might be regarded as an exercise in semantics! With a test-and-set
instruction, the critical region is within the instruction and the
interrupts are disabled (by the hardware) for the duration of the
instruction.

Thus, what Barr says is strictly correct, and so is Oyvind.

         Barry.
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