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Re: Disable interrupts in critical sections?

This might be regarded as an exercise in semantics! With a test-and-set
instruction, the critical region is within the instruction and the
interrupts are disabled (by the hardware) for the duration of the

Thus, what Barr says is strictly correct, and so is Oyvind.


| Barry M Cook, BSc, PhD, CEng, MBCS         Department of Computer Science, |
| Chartered Information Systems Engineer.    Keele University,               |
|                                            Keele,                          |
| Phone: +44 1782 583411                     Staffordshire,                  |
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| email: barry@xxxxxxxxxxxxxx                UK.                             |