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Unclocked logic / delay insensitive circuits

Barry and others,

CSP is very succesful in compilation to clocked logic.
What about compilation to unclocked logic?

I know Philips research has been performing significant
research in this area: they call it delay insensitive

They developed a kind of asynchronous CSP-like abstraction.
A quick overview of my view on those activities:

* They have got "Processes" connected via Channels.
* Processes can be composed from Processes (like CSP).
* Communication occurs via messages, which for the moment I'll
  call Marbles.
* A Marble may only be sent over a Channel if somehow, one can
  guarantee that a previously sent Marble has been received.
  Marbles are vulnarable: "when rolling them down a channel,
  one may go faster than the previous one, when they hit eachother,
  they fall to pieces".
* Incorrectness: a program in which marbles MAY get cracked,
  is considered incorrect"
* Incorrectness: a program in which deadlock may occur is
  considered to be incorrect.
* A Marble communication is implemented in hardware as a transition:
  both the transition logical "1" to logical "0", and
       the transition logical "0" to logical "1", are both considered
  to be a communication event.  Note that no data is transfered
* They have got a number of primitive processes.
  If I remember it correctly, one of them is the "MERGE(in1,in2,out)".
  MERGE is something like:
    MERGE = (in1?||in2?);out!;MERGE
  After initialisation, one can perform:

  After that, one HAS TO GET TO KNOW that out? has completed,
  before starting the next in1!;in2!.

  Difference with CSP: you can try to execute in1!;in2!;in1!;in2!, however
  after the second in2!, you get blocked until someone else has consumed
* Another primitive is: WIRE(in?, out!), and IWIRE(in?,out!)

  WIRE = in?;out!;WIRE
  IWIRE = out!;WIRE
* Advantages: electrical transitions take energy, since a delay insensitive
  circuits does not make any electrical transitions in parts that are not
  performing computation at that moment, energy can be saved.
  Example: a decoder for a CD player.  The error correction part only
           becomes active when an error has occured.  This only happens
           once-in-a-while, and only then, energy is used in the error
           correction unit.
* It releases all the constraints w.r.t. the clock interval, since there is
  no hardware clock at all: this makes IC development in many cases
  a lot simpler.
* This type of energy saving is ofcourse also useful in Space applications,
  an interesting area...?
   Cannot dealy insensitive circuits be simply implemented with a
   CSP-based approach?
My impression:
   It should be.