Re: Ravenscar profile and occam on the transputer

7. apr. 2017 kl. 18.46 skrev Lawrence Dickson <tjoccam@xxxxxxxxxxx>:

All,

In [2], Peter Morris says,

And once one has implemented CSP channels, one can implement ALTs by polling ready flags in the channels.

Does “polling" mean what it customarily means, trying again and again until an OK is found? If so, I would disagree that the described approach is a substitute for occam ALT, which does not poll.

In the context of «timing analysis» I don’t think he would have thought of busy polling. I have added Peter Morris on the list. Peter, are you there? Øyvind

Therefore, I disagree that an “occam Ravenscar” profile is superfluous. However, for schedulability it must be occam + priority. Given absolute high priority as found on the Transputer, and cycle-counted limits on high-priority code between deschedulings, a round-robin scheduler can guarantee response within a known count of cycles.

It’s either one or the other, isn’t it: 1.) occam Ravenscar or 2.) schedulability analysis and guaranteed response time? Or is there a possibility of both in a case? Øyvind

Larry

On Apr 7, 2017, at 1:52 AM, Teig, Oyvind UTC CCS <Oyvind.Teig@xxxxxxxxxxxxxxxx> wrote:

All

The Ravenscar profile is for safety critical systems written in Ada. It basically takes the rendezvous away. This opens for schedulability analysis. [1]

I have wondered about this in [2] (the “Computer scientist” quoted is close to the Ravenscar profile..)

Finally I now have had a mail with Roger Shepherd how the transputer tackled this, whether there also would be any reason to make an “occam Ravenscar” profile. From what he answered I think the answer is no. [3]

Any comments welcomed. Please state if your comment here might by name be quoted in the blog note. If I don’t see this specifically I will not do any copy paste. (But I will not guarantee that I might not mail you and ask in case I think you may have forgotten…)

For any one of you who are extremely knowledgable about the XMOS processors and XC I would be delighted to see this viewed also from that perspective..

[1] https://en.wikipedia.org/wiki/Ravenscar_profile
[2] http://oyvteig.blogspot.fr/2011/12/035-channels-and-rendezvous-vs-safety.html
[3] http://www.teigfam.net/oyvind/home/technology/138-determined-about-buffers-and-bit-arrays/

Med vennlig hilsen / Best regards
Øyvind Teig
Pensioner and blogger from June 2017
http://www.teigfam.net/oyvind/home/technology/
Senior utviklingsingeniør, siv.ing. / Senior Development Engineer, M.Sc.
Autronica Fire and Security AS
Research and Development
UTC Building and Industrial Systems
Phone: +47 95961506
E-mail: oyvind.teig@xxxxxxxxxxxxxxxx, web: www.autronicafire.no

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Øyvind TEIG
+47 959 615 06
oyvind.teig@xxxxxxxxxxx
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