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STREP FP6 proposal

Dear friends,

I am currently putting together a STREP FP6 proposal to co-design an
inherently "safe and secure" distributed RTOS for deeply embedded systems
(as a superset of the formal OpenComRTOS we are working on, KB's not MB's)
together with a supporting CPU (prototype in FPGA) and "links". Definitely
inspired by CSP although we are also looking at pi-calculus (occam-pi) and

One target is likely a transputer redone by a local high school in FPGA but
the idea is more to make a much smaller/bare-bones CPU (I now work partly
for Melexis who supplies to automotive and in this market high reliability,
low cost and low power are severe boundary conditions ).

This proposal is complementary to an larger proposal putting forward a
Systems Engineering methodology and toolchain based on the paradigm of
"communicating objects". (yes folks, CSP all the way, but perhaps a next
step as well).

Anyone interested to join, please contact me and I'll forward more

Best regards,

Eric Verhulst

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   Systematic Systems Development Methodologies
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